"Our team’s objective is to define optimal DSP architectures for use in Huawei’s basestation products. To do so, we evaluate various architectures under real-world load using our proprietary software as the benchmark. IP Designer is the enabling technology which allows us to evaluate several architectural options in a short period of time – resulting in DSPs that have better performance and efficiency in our end-systems than even the best-fit commercially available DSP IP. Matching the DSP architecture to our software enables us to further differentiate our offering in the marketplace."
Alan Gatherer
CTO for Baseband System on Chip
Huawei Technologies
Santa Clara, CA,
USA
Read all testimonies
Imec and Target Present Multi-Standard Low-Power LDPC Engine for Multi-Gbps Wireless Communication
Huawei Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Baseband DSP
Target’s IP Designer Tool-Suite Adopted by Dialog Semiconductor to Create OpenVG Graphics Processor Core
- IP Designer
- A retargetable tool-suite
for ASIP design
- IP Programmer
- Efficient SDKs for
ASIP-based SoCs
- ASIP Modeling Services
- Support services to develop nML processor models for IP Designer and IP Programmer
- MP Designer
- Multicore parallelization and platform generation
- Mobile World Congress
Barcelona, Feb. 25-28
- Embedded World
Nuremberg, Feb. 26-28
- CDNLive Silicon Valley
Santa Clara, Mar. 12
- Design Automation & Test in Europe
Grenoble, Mar. 19-21
- SNUG Silicon Valley
Santa Clara, Mar. 26
- Linley Mobile Conf.
Santa Clara, Apr. 17-18
- Design West
San Jose, Apr. 23-25
- ChipEx
Tel Aviv, May 1
- Embedded Systems Expo
Tokyo, May 8-10
- Multicore DevCon
Santa Clara, May 21-22
- Design Automation Conf.
Austin, June 3-5
We are looking for enthusiastic engineers to expand our teams in Leuven, Belgium, and Boulder, Colorado. Check out our career pages for details.
