Testimonies

Freescale Semiconductor

"A key enabler to our solution is the use of a retargetable compiler such as Chess, which allows fast analysis of, and improvements to, a chosen ISA, followed by a fast and efficient compilation and simulation of the chosen target architecture.

In summary, the Chess tool gives the designer immediate feedback, it permits DSP software, even the critical inner loops, to be written in C, and it makes new, specialized instructions readily accessible to the C code, often without having to make any changes to that C code."

Werner De Rammelaere
Freescale Semiconductor
Toulouse, France

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News

Target Compiler Technologies Unveils MP Designer™, a New Tool-Suite for Multicore SoC Design

Conexant Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Foundation DSP IP

CogniVue Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Image Cognition Processor

Imec and Target Present Innovative Flexible Forward Error-Correction Solution for Software-Defined Radios

Products/Technology

IP Designer
A retargetable tool-suite
for ASIP design
IP Programmer
Efficient SDKs for
ASIP-based SoCs
ASIP Modeling Services
Support services to develop nML processor models for IP Designer and IP Programmer

SPRING 2012 EVENTS

 

  • DATE
    Dresden, Mar. 13-15
  • Synopsys SNUG
    Santa Clara, Mar. 26
  • Multicore Dev Con
    San Jose, Mar. 27-29
  • ChipEx
    Tel Aviv, May 2