Testimonies

NXP

"We wanted our new DSP to outperform other solutions, not only in terms of power consumption and cost, but by offering very efficient C programmability at the same time.
For audio applications, assembly programming has often been deemed mandatory to meet the ultra-low power requirements. However, the CoolFlux DSP product has shown us the key to compiler friendly low-power design, which is the use of retargetable compilation technology."

Johan Van Ginderdeuren
NXP Semiconductors
Leuven, Belgium

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News

Target Compiler Technologies Unveils MP Designer™, a New Tool-Suite for Multicore SoC Design

Conexant Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Foundation DSP IP

CogniVue Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Image Cognition Processor

Imec and Target Present Innovative Flexible Forward Error-Correction Solution for Software-Defined Radios

Products/Technology

IP Designer
A retargetable tool-suite
for ASIP design
IP Programmer
Efficient SDKs for
ASIP-based SoCs
ASIP Modeling Services
Support services to develop nML processor models for IP Designer and IP Programmer

SPRING 2012 EVENTS

 

  • DATE
    Dresden, Mar. 13-15
  • Synopsys SNUG
    Santa Clara, Mar. 26
  • Multicore Dev Con
    San Jose, Mar. 27-29
  • ChipEx
    Tel Aviv, May 2