"In our first project, SiTel's existing GenDSP was described in Target's processor modelling language nML. A complete set of software development tools was available in about one month of time, and the VHDL hardware design could be completed a few weeks later.
We were more than excited to find out that the processor's footprint could be reduced even more by introducing encoded instruction words and smaller register sets, while at the same time an efficient C compiler, simulator, and debugging environment became available to develop the application software. For our C code benchmarks, the C compiler produced optimised machine code with the same execution time and smaller program code size than our manually optimised implementation on the existing GenDSP."
René Kohlmann
SiTel Semiconductor
's-Hertogenbosch, The Netherlands