Testimonies

Texas Instruments

"Creating next generation signal processing systems for multi-media or modem applications that support multiple standards on the same architecture requires flexibility for programming as well as unprecedented parallel processing capabilities. Reconciling what seem to be so opposite characteristics is a cornerstone for the success of these processing platforms.

Only Target's retargetable Chess/Checkers tool suite has got the right features to develop processors that offer programming flexibility using high-level languages like C while providing efficient capabilities to deploy instruction-level parallelism and to thoroughly debug the software execution. Surprisingly enough, as benchmarks demonstrated, these capabilities are coming without penalties in terms of power, performance or area for the resulting system."

Jean-Pierre Giacalone
Texas Instruments
Nice, France

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News

Target Compiler Technologies Unveils MP Designer™, a New Tool-Suite for Multicore SoC Design

Conexant Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Foundation DSP IP

CogniVue Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Image Cognition Processor

Imec and Target Present Innovative Flexible Forward Error-Correction Solution for Software-Defined Radios

Products/Technology

IP Designer
A retargetable tool-suite
for ASIP design
IP Programmer
Efficient SDKs for
ASIP-based SoCs
ASIP Modeling Services
Support services to develop nML processor models for IP Designer and IP Programmer

SPRING 2012 EVENTS

 

  • DATE
    Dresden, Mar. 13-15
  • Synopsys SNUG
    Santa Clara, Mar. 26
  • Multicore Dev Con
    San Jose, Mar. 27-29
  • ChipEx
    Tel Aviv, May 2