Resources

Wireless/Wireline

IMEC

Unified C-Programmable ASIP Architecture for Multi-Standard
Viterbi, Turbo and LDPC Decoding

Frederik Naessens, Praveen Raghavan, Liesbet Van der Perre, Antoine Dejonghe
IP-SoC Conference, Grenoble, December 2011

IMEC

Exploration of Cryptographic ASIP Designs for Wireless Sensor Nodes
Ioanna Tsekoura, Georgios Selimis, Jos Hulzink, Francky Catthoor,
Jos Huisken, Harmke de Groot, Constantinos Goutis
17th IEEE Intl. Conf. on Electronics Circuits and Systems, Athens, December 2010

IMEC

Hardware Accelerator Performance in a Programmable Context - Methodology and Case Study
Steve Cox, Gert Goossens
5th Annual Multicore Expo, San Jose, April 2010

IMEC

Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing
Andreas Genser, Christian Bachmann, Christian Steger, Jos Hulzink, Mladen Berekovic
ASAP-09 Conference, Boston, 2009

IMEC

A Low-Power ASIP for IEEE 802.15.4a Ultra-Wideband Impulse Radio Baseband Processing
Christian Bachmann, Andreas Genser, Jos Hulzink, Mladen Berekovic, Christian Steger
Design Automation and Test in Europe (DATE-09), Nice, 2009

Texas Instruments

Multi-mode multi-core modem design using ESL, ASIP and RTL Flow
Manish Goel, Srinivas Lingam
4th Annual Multicore Expo, Santa Clara, 2009

Nokia

Implementation of an HSDPA Receiver with a Customized
Vector Processor

Kim Rounioja, Kimmo Puusaari
International Symposium on System-on-Chip (SoC 2006),
Tampere, 2006

News

Target Compiler Technologies Unveils MP Designer™, a New Tool-Suite for Multicore SoC Design

Conexant Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Foundation DSP IP

CogniVue Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Image Cognition Processor

Imec and Target Present Innovative Flexible Forward Error-Correction Solution for Software-Defined Radios

Products/Technology

IP Designer
A retargetable tool-suite
for ASIP design
IP Programmer
Efficient SDKs for
ASIP-based SoCs
ASIP Modeling Services
Support services to develop nML processor models for IP Designer and IP Programmer

SPRING 2012 EVENTS

 

  • DATE
    Dresden, Mar. 13-15
  • Synopsys SNUG
    Santa Clara, Mar. 26
  • Multicore Dev Con
    San Jose, Mar. 27-29
  • ChipEx
    Tel Aviv, May 2