Wireless/Wireline
Hardware Accelerator Performance in a Programmable Context - Methodology and Case Study
Steve Cox, Gert Goossens
5th Annual Multicore Expo, San Jose, April 2010
Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing
Andreas Genser, Christian Bachmann, Christian Steger, Jos Hulzink, Mladen Berekovic
ASAP-09 Conference, Boston, 2009
A Low-Power ASIP for IEEE 802.15.4a Ultra-Wideband Impulse Radio Baseband Processing
Christian Bachmann, Andreas Genser, Jos Hulzink, Mladen Berekovic, Christian Steger
Design Automation and Test in Europe (DATE-09), Nice, 2009
Multi-mode multi-core modem
design using ESL, ASIP and RTL Flow
Manish Goel, Srinivas Lingam
4th Annual Multicore Expo,
Santa Clara, 2009
Implementation of an HSDPA Receiver with a Customized
Vector Processor
Kim Rounioja, Kimmo Puusaari
International Symposium on System-on-Chip (SoC 2006),
Tampere, 2006