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Partners

Target's IP Designer and IP Programmer tool-suites are interoperable with all industry-standard tool-flows from major EDA vendors, both at Electronic System Level (ESL) and Register-Transfer Level (RTL).

To ensure such interoperability, Target has joined the interoperability programs of several EDA vendors, including:

			In-Sync Program Interoperability between IP Designer's RTL generation component and Synopsys' Design Compiler logic synthesis environment. Interoperability between IP Designer's RTL generation component and Synopsys' VCS simulation environment.
			System Level Catalyst Program Interoperability between IP Designer's and IP Programmer's SystemC-wrapped instruction-set simulation component and Synopsys' Platform Architect virtual platform modelling environment. Interoperability between IP Designer's and IP Programmer's SystemC-wrapped instruction-set simulation component and Synopsys' Innovator virtual platform modelling environment.
			Value Added Partner Program Interoperability between IP Designer's and IP Programmer's SystemC-wrapped instruction-set simulation component and Mentor Graphics' Questa/ModelSim simulation environment. Interoperability between IP Designer's RTL generation component and Mentor Graphics' Questa/ModelSim simulation environment.
			Connections Program Interoperability between IP Designer's RTL generation component and Cadence's RTL design environment (RTL Compiler, Encounter Power System, Encounter Timing System, Incisive Enterprise Simulator, and First Encounter).
			EDANet Partner Program Interoperability between IP Designer's RTL generation component and ARM's standard cell IP libraries.

 

News

Imec and Target Present Multi-Standard Low-Power LDPC Engine for Multi-Gbps Wireless Communication

Huawei Adopts Target’s IP Designer Tool-Suite to Build Next-Generation Baseband DSP

Target’s IP Designer Tool-Suite Adopted by Dialog Semiconductor to Create OpenVG Graphics Processor Core

Products/Technology

IP Designer

A retargetable tool-suite
for ASIP design

IP Programmer

Efficient SDKs for
ASIP-based SoCs

ASIP Modeling Services

Support services to develop nML processor models for IP Designer and IP Programmer

MP Designer

Multicore parallelization and platform generation

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