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IP Designer

IP Designer is a retargetable tool suite, intended for the development, programming and verification of application-specific processors (ASIPs). IP Designer is based on a unique, patented technology.

Designers describe and optimise the instruction-set architecture of their ASIP in nML.  IP Designer's retargetable Software Development Kit (SDK) automatically targets any ASIP architecture  modelled in nML.  This enables architectural optimisation driven by C compilation.

 

From the nML description a synthesisable RTL model is derived, suited for implementation in ASIC or FPGA using third-party synthesis tools.  A test program generator, produces pseudo-random instruction sequences for final testing of the RTL model.

IP Programmer

IP Programmer is an instantiation of the IP Designer tool suite, consisting of the SDK part only.  IP Programmer SDKs retrieve the processor information from a pre-compiled shared object (DLL) in stead of nML source code.

Background info

Technical brief

Tutorials


Technical fact sheets

Downloadable documents

Chess/Checkers leaflet

Chess/Checkers whitepaper
IP Designer and IP Programmer
overview leaflet

(4 pages)

IP Designer
technical brief

(4 pages)

IP Designer
technical white paper
(14 pages)

English English  Japanese Japanese
English English  Japanese Japanese
English English  Japanese Japanese

Publications

Publications

 

Check out our selection of publications on the IP Designer technology and its application, written by engineers from Target and Target's customers.


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Last updated : Sat Apr 12 2008