Tokyo, July 9 2003.  Target Compiler Technologies announced today that the company’s retargetable tool-suite has aided in the successful tape out of ST’s latest ADSL Customer Premises (CPE) chip. Two of the critical building blocks of this device were designed with Target Compiler Technologies’ retargetable tool-suite. Both blocks are involved in iterative algorithms and high-data throughput operations required to get the best performances of the ADSL physical layer with the latest ADSL standards, including ADSL2, and ADSL+. The resulting product will be capable of reaching speeds up to 20 Mbps, doubling the speed current ADSL standard products.

Using patented technology in the Chess C compiler, the retargetable tool-suite enables full use of instruction level parallelism, pipelining, and the heterogeneous aspects of embedded processor architectures. The result is a highly optimized code, giving superior performance and energy characteristics with a high level of programmability. The use of these tools enabled ST to add flexibility through C programmability, while maintaining the performance characteristics of a hardwired ASIC application.

“To reduce the risk involved and to accelerate the development time, we needed a more flexible, programmable ADSL solution”, said Leon Cloetens, vice president of the Telecom Group and General Manager of the Access Products Division of STMicroelectronics. “Target Compiler Technologies provided a solution that not only gave us this flexibility we required, but did not jeopardize the performance and die size characteristics that our customers demand. After a careful analysis of the alternatives on the market, we decided that the retargetable tool-suite by Target was the best solution to design the programmable modules in our system-on-chip ASIC”.

“ST needed to develop a design that could outperform their competitors in terms of throughput, die size and power consumption characteristics”, said Tony Picard, Sales and Marketing Manager at Target. “By designing their DSP cores using our tools, ST was able to utilize the characteristics of the algorithm to achieve an optimal match with their dedicated processor architecture.”

“In addition, ST has used the retargetable tool-suite to make dramatic changes in the algorithm and functionality very late in the design cycle, added Picard. “This allows full management of the embedded processors with a very dedicated ASIC-like data path.  Once the optimal match between the architecture and the software applications was found, ST was able to automatically produce synthesizable RTL code.”

“The tool set also allowed extensive use of co-simulation to perform hardware validation based on the same System C code compiled in the system model. We could correlate the results in a co-simulation of our VHDL and the Target ISS”, said Laurent Dawance, Digital Design Manager at STMicroelectronics, Zaventem Belgium.

STMicroelectronics is in the process of designing several more programmable ASICs in the Target tool-suite.

About Target Compiler Technologies

Target Compiler Technologies N.V. introduces a novel design paradigm, to accelerate the development, programming and verification of flexible and royalty-free IP cores in the form of programmable ASICs and embedded processors.

At the heart of this approach is Chess/Checkers, a complete and retargetable computer-aided design environment.  The unique, patented technology in the Chess C compiler enables full exploitation of the instruction level parallelism, pipelining and the heterogeneous aspects of embedded processor architectures.
This results in highly optimized code, superior performance and energy characteristics of the programmable device.

In addition to the Chess/Checkers tool-suite, Target offers extensive training and support possibilities, including processor-modeling services, to help its customers to get to market in the fastest possible way.

Chess/Checkers has been applied successfully to design customized cores for diverse application domains, including GSM, 3G, VoIP, audio coding, ADSL, VDSL, wireless LAN, WCDMA, hearing aids, and various control and interfacing applications.