Press Release
Target Compiler Technologies Unveils Retargetable Support Tools for Application-Specific DSPs
New 'Chess/Checkers' Environment to be Demonstrated at 1998 Embedded Systems Conference
Leuven, Belgium, October 19, 1998 – Target Compiler Technologies ('Target'), a manufacturer of advanced EDA tools based in Leuven, Belgium, today announced that it will introduce its new tool suite, called Chess/Checkers, at the upcoming Embedded Systems Conference. The Chess/Checkers environment supports the design and use of application-specific digital signal processors.
The new environment has been under development by Target since its spin-off from the Belgian micro-electronics research centre IMEC, mid 1996. The tools have been under alpha and beta test at selected customers' sites, since 1997. The Chess/Checkers tools have been successfully applied in design projects by first customers, including the design and programming of a new application-specific processor for GSM speech coding by Motorola.
The Chess/Checkers environment consists of a C compiler (Chess), a linker (Bridge), an instruction-set simulator (Checkers), and an assembler and disassembler (Darts). In contrast to many other DSP support tools, Chess/Checkers is a retargetable environment. Designers can specify the behaviour of their application-specific DSP in a high-level processor description language, called `nML'. Automatically all tools will work for the specified processor architecture.
The Chess/Checkers tools are primarily intended for designers of application-specific DSP cores in high-volume markets, such as telecom and consumer applications. By optimising the DSP core's architecture and instruction set to the application at hand, superior performance and a reduced footprint and power dissipation are obtained compared to general-purpose cores. The tools provide a powerful infrastructure for embedded systems companies, allowing to create, maintain and use new proprietary IP blocks in the form of application-specific DSP cores, independent from external processor vendors.
According to Gert Goossens, Target's general manager, Chess/Checkers turns the traditional approach to processor design on its head. "Until recently, tool support was only considered after the processor architecture was finished," Goossens said. "With Chess/Checkers, tools are available right from the beginning of the architecture design process. Designers can perform true architectural exploration, by trying out alternative architectures in nML and evaluating their performance by running the retargetable compiler and instruction-set simulator," he added.
nML is a high-level language that captures a programmer's model of the processor. A first version of the language was developed at the Technical University of Berlin. Target said it significantly modified the language to make it well suited for retargetable compilation. "Experience shows that nML is quickly accepted by architecture designers and programmers who are used to writing assembly code," Goossens said.
Target currently offers Chess/Checkers as a retargetable tool set, allowing users to enter and modify their own nML processor models. Target also said that it will be able to create non-retargetable versions of the tools, incorporating a fixed nML model provided by its customers. These non-retargetable tools can be distributed to system integrators who want to implement their system on the application-specific processor.
According to Goossens, existing design projects have shown that the Chess compiler is able to produce efficient code. "The early use of the tools during the architecture design phase naturally leads to an architecture that is well suited for the Chess compiler," he said. "The compiler also uses novel algorithmic optimisation techniques that improve the code quality. As a result, large applications can be implemented completely from C specs and the resulting code quality is comparable to manually optimised assembly code."
Chess favours a certain style of DSP architectures. It provides specific support for DSPs featuring heavily encoded instructions and a heterogeneous register set. The compiler assumes time-stationary coding, i.e. every instruction executes in a single cycle. This implies that the data pipeline is fully controlled by the software that is generated by the Chess compiler. This significantly reduces the complexity of the DSP's controller.
Chess/Checkers is currently available on Unix platforms. The tools will be demonstrated at the 1998 Embedded Systems Conference, San Jose Convention Center, booth T408, San Jose, California, November 3-5, 1998.
Corporate Information
Target Compiler Technologies n.v. is an innovation company, specialising in design technologies for embedded software in electronic systems. Target was incorporated in 1996 as a spin-off company of IMEC, the Belgian R&D centre for micro-electronics. Target's shareholders are IMEC v.z.w., Software Holding & Finance n.v. (a Belgian private holding, investing in high-tech companies) and Tetracom b.v.b.a. (a group representing Target's management). Target is managed by Gert Goossens, Dirk Lanneer, Werner Geurts and Johan Van Praet, who all transferred from IMEC in 1996.
Target focuses on system design companies in competitive market segments like telecommunications and consumer electronics. Target's main product, Chess/Checkers, is based on a unique, patented technology initiated at IMEC.
Contact
Gert Goossens
Target Compiler Technologies n.v.
Phone: +32-16-40 81 14
Fax: +32-16-40 53 00
E-mail:
www.retarget.com
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