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Target Compiler Technologies signs Acetronix as its agent for Korea

Leuven, Belgium and Seoul, Korea, March 31, 2010 – Target Compiler Technologies (www.retarget.com), the leader in EDA design tools for application-specific processors (ASIPs), and Acetronix, a leading South Korean supplier of semiconductor and software products, are pleased to announce that they have signed an exclusive agency agreement for the South Korean market. This agreement is the next step in the strategy of Target to establish local representations in regions with a high concentration of semiconductor design centers active in the development of advanced systems-on-chip (SoCs).

Acetronix, headquartered in Seoul, will provide sales and marketing support for Target’s IP Designer and IP Programmer EDA tools.

“The technology of Target to design, optimize, verify, integrate and program ASIP cores is very interesting for leading chip manufacturers and fabless semiconductor vendors in Korea. We see a growing number of companies in Korea that design advanced SoCs with stringent performance, power consumption and cost requirements, and are interested in the flexibility offered by ASIPs,” said Sung Ho (Shane) Rhee, CEO of Acetronix.

Target already gained traction within the Korean SoC design community, e.g. through its collaboration with ETRI, Korea’s leading research centre for electronics and telecommunications. “For a number of years, we’ve been using Target’s IP Designer tool-suite to design and program of our media processor called EMP,” said Young-Su Kwon, lead architect at ETRI. “The automatically generated software development kit has enabled us to deploy our media processor with Korean fabless chip manufacturers. We are pleased to see Target engaging further in the Korean market, so that chip or system manufacturers and design houses can take advantage of the excellent tools offered,” Kwon added.

Gert Goossens, CEO of Target commented: “Korea is a very important market for our products as it has a large number of innovative chip design companies. Today, the country is moving towards system-on-chip design, in which ASIPs are playing an increasingly prominent role. Acetronix is the ideal partner to enter Korea, because of its knowledge and long-standing relationship with the key players in the Korean semiconductor market.”

About Target Compiler Technologies
Target Compiler Technologies is the leading provider of retargetable software tools to automate the design, programming and verification of application-specific processor cores (ASIPs). Target's IP Designer tool suite has been applied by customers worldwide for diverse application domains, including DECT, GSM, WCDMA, HSDPA and LTE handsets, VoIP, audio coding, car infotainment, ADSL and VDSL modems, wireless LAN, hearing instruments, mobile image processing, video processing, and automotive control applications. Target is a spin-off of IMEC, is headquartered in Leuven, Belgium, with North American operations in Boulder, Colorado. For more information about Target Compiler Technologies, visit www.retarget.com.

About Acetronix
Acetronix was established in 1991 with a mission to provide superior technical representation and to add value to a focused group of leading-edge corporations by offering synergistic, valuable and highly innovative solutions for our customers’ design, procurement and manufacturing needs. Acetronix focuses on continuous improvement on quality, service, and productivity, and hence provides value to both customers and vendors.

Contact information

Jeroen De Lille
Target Compiler Technologies
Technologielaan 11-0002
B-3001 Leuven Belgium
Tel.: +32-16-38 10 47
Email: jeroen.de.lille@retarget.com

Sung Ho (Shane) Rhee
Acetronix
Ashiville Palace
31-13 Hap-dong
Sudaimoon-ku
Seoul 120-030
Republic of Korea
Tel: +82-2-364-6080
Email: ace@ace-tronix.co.kr

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Products/Technology

IP Designer
A retargetable tool-suite
for ASIP design
IP Programmer
Efficient SDKs for
ASIP-based SoCs
ASIP Modeling Services
Support services to develop nML processor models for IP Designer and IP Programmer
MP Designer
Multicore parallelization and platform generation

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