BrightScale adopts Target's C Compiler technology for BA1024 media processor
May 22, 2007. BrightScale Inc., a semiconductor company leading the revolution in programmable HDTV chip sets, has successfully adopted Target's C compiler technology for its new BrightScale ArrayTM "BA1024" media processor. This was jointly announced by Target and BrightScale at the Microprocessor Forum in San Jose, California, today.
BA1024 is a SIMD architecture with 1024 processing elements, supporting dual MPEG2 transport streams and simultaneous decoding of dual HD H.264, VC-1 and MPEG2 video, as well as advanced signal pre- and post-processing.
Target delivers a comprehensive software development kit for the BA1024, based on its patented graph-based optimising C compiler technology. This SDK provides BrightScale's customers with the ability to adapt their end products to evolving video processing algorithms and digital television standards.
With this announcement, Target adds efficient techniques for instruction predication to its C compiler, which are essential for both SIMD and VLIW compilation.
More details can be found in Target's and BrightScale's joint press release.
Target expands into North America and Japan
November 30, 2006. Target today announced that it has made two new important steps in its international expansion.
First, Target announced its expansion into the United States and Canada, with the appointment of Steve Cox as its Vice President of Business Development for North America. Steve is a 20 year veteran of the computing and EDA industry. He will be leading the deployment of Target's tools for custom processor design at a time when multi-processor system-on-chip design in America is hot, especially in the telecom and multimedia markets. Target's North American activities will be run out of Boulder, Colorado.
Secondly, Target announced that it signed an exclusive agency agreement for the Israeli market with ITEC, Israel's reputed EDA distributor based out of Tel Aviv. ITEC will deploy Target's processor design tools to the many Israeli semiconductor design centres, which today are at the forefront of the multi-processor system-on-chip design wave.
The expansion into North America and Israel is a key milestone for Target, as it marks exactly ten years of delivering market proven tools that speed the design, programming, and verification of custom processor cores.
For more details, please consult our press releases on the expansion into North America and Israel.
Atmet adopts Target's C compiler technology for its floating point DSP engine
July 24, 2006. Atmel Corporation successfully adopted Target's tool suite as an integrated design and programming environment for the floating-point DSP in its dual-processor platform. This platform is targeted at high-end consumer applications such as hands-free phones, robotics, acoustic diagnostics, sound processing, music synthesis, and ultra-sound scanners.
First, Atmel used Target's retargetable tool suite to model its floating-point DSP architecture and to tune its instruction-set architecture for better performance. Next, a software development tool-kit was generated for the DSP, which Atmel can now deliver to its customers and partners.
Atmel commented that the quick availability of an efficient C compiler was a compelling reason for selecting Target's tool suite. According to Atmel, benchmark tests revealed that the execution time of the machine code generated by Target's C compiler is very close to the optimal solution for its floating-point DSP architecture.
More details can be found in our press release.
SiTel Semiconductor selects Chess/Checkers to design DSPs for next-generation cordless and audio systems
March 6, 2006. SiTel Semiconductor has signed a multi-year license agreement to use Target's software tools to design and program its next-generation DSPs for cordless and audio systems.
As a leading supplier of chip sets for cordless communication, SiTel has a global share of more than 30% of the DECT cordless phone chip set market, and has won the market for cordless gamepads. SiTel's choice for Target's tools is driven by the company's direction towards flexible systems-on-a-chip with differentiating features for next-generation wireless systems, which may include e.g. VoIP telephony, home entertainment, gaming, and headset functions.
These functionalities necessitate more advanced small-footprint ultra-low power DSPs, supported by efficient C compilation and debugging tools.
Under the multi-year license agreement, Target provides both its retargetable Chess/Checkers tools to design new application-specific DSPs, as well as software development kits (SDKs) to enable SiTel's customers to program these DSPs.
For more information please read our press release.
AOI embarks on Chess/Checkers for multi-media chips
April 4, 2005. AOI Technology Inc. today announced that it has licensed Target's Chess/Checkers retargetable tool-suite for the design of flexible processor cores. Chess/Checkers is being used successfully by AOI Technology as its main development environment for its next-generation configurable LSI chips for multi-media systems.
AOI stated to have selected the Chess/Checkers tool-suite because of its excellent support for digital signal processing functions, and its ability to support a wide variety of architectures.
AOI Technology is a leading provider of high-performance and low-power multi-media ICs for various still image, video and audio codecs. AOI Technology, based in Tokyo, Japan, is the joint-venture of Olympus Corporation and ITX Corporation.
For more information please read the joint press release.
Philips
July 7, 2004. Philips has started the distribution of an advanced software development kit (SDK) for its CoolFlux DSP core. Thise SDK, called "Checkmate for CoolFlux DSP" was developed by Target and includes an optimising C compiler, assembler, instruction-set simulator and graphical debugger.
According to Philips, one of CoolFlux DSP's distinguishing features is that it has been designed for best C compiler performance. During the architectural design phase, Philips made intensive use of Target's Chess/Checkers retargetable tool-suite, in order to match the architecture to the application requirements and to ensure efficient C compiler support.
Next the "Checkmate for CoolFlux DSP" SDK has been automatically generated.
The SDK is already being used by CoolFlux DSP's lead customers, and an evaluation license is available via Philips to subscribers of Synopsys' DesignWare library.
This announcement was made today by Philips and Target at ESEC in Tokyo. For more info see the joint press release.
Synopsis and Philips
May 11, 2004. Synopsys and Philips announced that Philips' CoolFlux DSP is now distributed as a StarIP block in Synopsys' DesignWare program.
CoolFlux DSP is the first DSP core that becomes available to the 25,000 DesignWare users. The core joins the 16- and 32-bit microcontrollers from industry leaders such as IBM, Infineon, MIPS and NEC.
CoolFlux DSP is a 24-bit low-power audio DSP, designed by Philips using Target's Chess/Checkers tool-suite.
Using the retargetable tools technology, Philips' architecture design team was able to take C compilation aspects into account from day one, resulting in a core with excellent C compiler support.
Read more about the Synopsys/Philips partnership in their joint press release and in Synopys' Compiler magazine. For more information about CoolFlux DSP, visit the CoolFlux DSP website.
Chess/Checkers enables Gennum's first-pass working silicon for hearing instrumet chip
February 9, 2004. Genum Corporation has sucessfully designed first-pass working silicon for its Yukon ultra low power microprocessor core for hearing instrument products. To accelerate the design of Yukon, Gennum used Target's Chess/Checkers retargetable tool flow. Yukon is used in an audio processing system that has begun shipping in volume.
Following the success of Yukon, Gennum also developed a new application specific DSP core using the Chess/Checkers tool suite. This DSP will enable a variety of advanced adaptive algorithms for hearing instrument devices, and will be in production later this year.
For more information please consult our press release.
ST Microelectronics tapes out new ADSL chip designed using Chess/Checkers
July 9, 2003. ST Microelectronics has successfully taped out its latest ADSL customers premises (CPE) chip. Two of the critical blocks of this device were designed with Target's Chess/Checkers retargetable tool-suite.
Both blocks are involved in iterative algorithms and high-data throughput operations required to get the best performances of the ADSL physical layer with the latest ADSL standards, including ADSL2, and ADSL+.
The resulting product will be capable of reaching speeds up to 20 Mbps, doubling the speed of current ADSL standard products.
This design win was announced by Target today, during a press conference at ESEC in Tokyo. For more information please read our press release.
Philips designs ultra-low power audio DSP with Chess/Checkers
April 2003. Philips has successfully designed its latest audio DSP, named "CoolFlux DSP", using Target's Chess/Checkers tool-suite. The new design was announced by Philips in the April 2003 edition of the DSP Valley Newsletter.
Philips reported that significant architectural exploration was done on the CoolFlux DSP design, in very aggressive time scales. This allowed to optimally control the power consumption.
As a result, CoolFlux DSP is an ultra-low power audio core. Philips reported that a full featured MP3 decoder, automatically compiled with Target's C compiler, requires less than 15 MIPS on the CoolFlux DSP, with a power consumption of less than 1 mW.
For more details please consult the DSP Valley Newsletter article.
Target introduces processor verification tool-flow
December 12, 2002. Target announced the availability of new verification capabilities in the Chess/Checkers tool-suite.
First, a retargetable test program generator for flexible processor cores has been released. Secondly, Chess/Checkers now supports on-chip debugging of flexible processor cores. For more information please read our press release.
Tutorial on nML processor description language
June 6, 2002. An up-to-date tutorial on the nML processor description language is now available on the web, at nml.retarget.com.
Next to the basic concepts of the nML language, the tutorial describes recent language extensions to model complex pipeline and interlocking behaviour of contemporary processor architectures.