Architectural exploration

Chess offers unique capabilities for architectural exploration. Users can describe alternative processor architectures in nML, and compare their performance by compiling benchmark C functions onto each architecture and evaluating the results.

Wide retargetability

Chess supports a wide range of processor architectures, from general-purpose DSP and microprocessors to programmable datapath cores:

• Instruction-level and data-level parallelism.
• General as well as customised arithmetic instructions and data types. 
• From orhogonal to highly encoded instruction formats. 
• Support of multiple memories, possibly with multiple ports. Support of many different addressing modes, including indexed, direct and indirect addressing, possibly with post-modification. 
• From general-purpose register-files to special-purpose registers. Support of coupled operand and/or result registers. 
• From shallow to deep instruction pipelining.
• Support of multi-cycle and multi-word instructions, delay slots, and resolution of pipeline hazards by the compiler. 
• Subroutine and interrupt support, with or without a software stack. 
• Support of hardware-loop instructions and of residual control using mode registers. 
• Support of control flow through branching instructions as well as through predicated execution.

C source code

Chess supports ISO C99 code, possibly extended with user-defined data types and operators using C++ classes and operator overloading. Support of C++ member functions.

Compiler optimisations

• High-level code optimisations: data-flow analysis, memory reference disambiguation, constant folding, strength reduction, common sub-expression elimination, induction variable analysis, loop-invariant code analysis, hardware-loop selection, dead and unreachable code elimination, in-line expansion. 
• Code selection, supporting mapping of operation patterns onto specialised instructions.
• Register allocation, supporting different routing schemes between distributed registers. 
• Efficient implementation of subroutines, using optimised caller or callee based context switching - optionally with inter-procedural optimisation, stack or register based argument passing, and stack memory address optimisation.
• Scheduling with software pipelining. 
• Support of intrinsic function calls and of in-line assembly code. 

Chess is available on Linux and Windows.